List of Unit Digital Techniques K scheme syllabus
Unit 1 – Number Systems
1.1 Number Systems: Types of Number Systems (Binary, Octal, Decimal, Hexadecimal), conversion of number systems1.2 Binary Arithemetic: Addition, Subtraction, Multiplication and Division1.3 Subtraction using 1’s and 2’s complement method1.4 Codes: BCD, Gray code, Excess-3 and ASCII code,Code conversions, Applications of codes.1.5 BCD Arithemetic: BCD Addition, Subtraction using 9’s and 10’s complement
Unit – II Logic Gates and Boolean Algebra
2.1 Logic Families: Characteristics Parameters of logic Families- Noise margin, Power dissipation, Figure of merit ,Fan in, Fan out, Speed of operation, maximum clock frequency supply voltage requirement ,power per gate , Comparison of TTL, CMOS and ECL logic family2.2 Introduction to positive and negative logic systems, Logic Gates: Symbol ,Truth table of Basic logic gates(AND,OR,NOT),Universal gates(NAND,NOR) and Special purpose gates(EX-OR,EX-NOR)2.3 Buffer: Tristate logic, Unidirectional and Bidirectional2.4 Boolean algebra : Laws of Boolean algebra, Duality Theorem ,De-Morgan’s theorem
Unit – III Combinational Logic Circuits
Unit – III Combinational Logic Circuits3.1 Standard Boolean expression: Sum of products [SOP] and Products of Sum [POS], Min-term and Max-term, SOP-POS form conversion, realisation using NAND/NOR gates3.2 Boolean Expression reduction using K-map: Minimization of Boolean expressions (upto 4 variables) using SOP and POS form3.3 Arithemetic circuits : design Half and Full Adder using K-maps, design Half and Full Subtractor using K-maps , n bit adder and n bit subtractor .3.4 Encoder and Decoder: Functions of Encoder and Decoder, Block Diagram and Truth table, Priority Encoder (4:2, 8:3), BCD to 7 segment Decoder/Driver, Keyboard Encoder / decoder3.5 Multiplexer and Demultiplexer: Working, Truth table and applications of MUX and DEMUX. MUX tree, DEMUX tree, DEMUX as Decoder
Unit – IV Sequential Logic Circuits
4.1 Difference between Combinational and Sequential Logic circuits, Time independent (un-clocked )and Time dependent ( Clocked ) logic system , Flips- Flops and Latch, Basic memory cell ,RS-Latch using NAND and NOR, Triggering methods- Edge trigger and Level Trigger4.2 Flip-Flops: S-R, J-K, T and D, Truth table and logic circuits of each flip-flop, Excitation table, applications4.3 Race around condition in JK flip-flop, Master- Slave JK Flip Flop4.4 Shift registers- Serial In Serial Out, Serial In Parallel Out, Parallel In Serial Out ,Parallel In Parallel Out,Bi-directional Shift register, 4-bit Universal Shift register4.5 Counters- Synchronous and Asynchronous counters, Modulus of counter, Ripple counter, Ring Counter, Twisted Ring Counter, Up – down counter, Decade Counter, MOD-N counter, Timing Diagram
Unit – V Data Converters and Memories
5.1 Digital to Analog Data Converter (DAC)- circuit diagram and working of Weighted resistor DAC and R-2R Ladder DAC, DAC Specification/Selection factors5.2 Analog to Digital Data Converter (ADC) : Block Diagram, Types and Working of Dual Slope ADC, Successive Approximation, Flash Type ADC, ADC selection factors/ specifications5.3 Memories: Types- Primary memory , Secondary Memory, Organization, Dimension, Memory Bank, Features , Applications: RAM (SRAM, DRAM), Volatile and Non-Volatile, ROM (PROM, EPROM, EEPROM), Flash Memory, Comparison of RAM and ROM,EPROM and Flash Memory, SIMM: Features, SSD memory: Features,